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Reliability testing of high aspect ratio through silicon vias fabricated with atomic layer deposition barrier, seed layer and direct plating and material properties characterization of electrografted insulator, barrier and seed layer for 3-D integration

Type:
Conference Proceedings
Info:
2010 IEEE International 3D Systems Integration Conference (3DIC)
Date:
2010-11-16
DOI:
http://dx.doi.org/10.1109/3DIC.2010.5751434

Author Information

Name Institution
J. D. ReedRTI International
S. GoodwinRTI International
C. GregoryRTI International
D. TempleRTI International

Films

Plasma TiN

Hardware used: Unknown
TDMATi, tetrakis(dimethylamido)titanium, titanium dimethylamide, (Me2N)4Ti
CAS#: 3275-24-9
N2, Nitrogen
CAS#: 7727-37-9
Deposition Temperature = 250C

Thermal TiN

Hardware used: Unknown
TiCl4, Titanium Tetrachloride
CAS#: 7550-45-0
NH3, Ammonia
CAS#: 7664-41-7
Deposition Temperature = 400C

Thermal Ru

Hardware used: Unknown
Bis(EthylCycloPentadienyl)Ruthenium, Ru(EtCp)2
CAS#: 32992-96-4
O2, Oxygen
CAS#: 7782-44-7
Deposition Temperature Range = 270-350C

Film/Plasma Properties

Characteristic: Morphology, Roughness, Topography
Analysis: -
Diagnostic: -

Characteristic: Resistivity, Sheet Resistance
Analysis: -
Diagnostic: -

Characteristic: Conformality, Step Coverage
Analysis: SEM, Scanning Electron Microscopy
Diagnostic: -

Characteristic: Chemical Composition, Impurities
Analysis: EDS, EDX, Energy Dispersive X-ray Spectroscopy
Diagnostic: -

Substrates

SiO2

Notes

731